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Conference

2016

Effect of Substrate Orientation on the Solar Efficiency and the Electrical Properties of Sulfonated Polyaniline (SPAN), Grown on (100) and (311)A GaAs

2016-02
5th Anniversary of ANSOLE (2011-2016): International Conference on Renewable Energy (INCORE2016), Cairo, Egypt February 3-6, (2016).
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2014

Investigation of Defects in Polyaniline (PANI) Grown on High Index GaAs Planes Using Current-Voltage, Conductance and Deep Level Transient Spectroscopy (DLTS)

2014-09
17th International Conference on Extended Defects in Semiconductors (EDS-2014), Gottingen, Germany, 14-19 September, (2014).
One of the most important class of organic and conjugated polymers is polyaniline (PANI) that possesses excellent optical, electronic, and redox properties [1]. Conductive polymer PANI grown on III-V semiconductor substrates has many advantages in photovoltaic applications [2, 3]. Polymers can be grown over large area with low cost. However, the presence of interfacial states due to the presence of a layer of oxygen over the semiconductor substrate (GaAs) causes serious issues in the performance of these devices. It is therefore vital to have knowledge of interfacial states and types of defects introduced during growth and/or processing. In this work we will report the first systematic studies of PANI grown on n-type (311)A and (311)B GaAs substrates. Current-Voltage-Temperature measurements were performed to determine the ideality factor (n) and barrier height (φB) of the heterojunction using the Schottky barrier model. Capacitance-Conductance-Frequency measurements were carried out at 0V DC bias voltage on both PANI/(311)A GaAs and PANI/(311)B GaAs, and shallow level is detected at the interface. In addition, series resistance (Rs) for both samples have been calculated by Capacitance-Conductance-Frequency measurements. In order to confirm further the type of defects, DLTS measurements are performed with small reverse bias (VR=-0.25V, VP=0V) and forward bias (VR=0V, VP=0.25V). The DLTS technique is powerful technique to determine traps present at the interfaces. The DLTS measurements revealed a hole trap which has almost the same energy as the one detected by conductance measurements. This confirms the defect detected by conductance measurements in both devices is a hole trap that is present in PANI. Moreover, DLTS revealed that both samples PANI/(311)A GaAs and PANI/(311)B GaAs exhibit hole and electron traps. The reverse current-voltage characteristics show that the deep electron trap is one of the major cause of the high reverse current in PANI/(311)A GaAs samples. It is worth pointing out that our PANI/(311)A GaAs and PANI/(311)B GaAs samples have better properties in terms of reverse currents than those previously reported PANI/(100) GaAs [2, 3] devices. [1] S. E. El-Zohary et al., Journal of Nanomaterials, Vol. 2013, p. 8 (2013). [2] F. Yakuphanoglu and B. F. Şenkal, Synthetic Metals, Vol. 158, pp. 821-825 (2008). [3] D. P. Halliday et al., Synthetic Metals, Vol. 102, p. 877 (1999).

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